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Layout Design Engineer

Job Category: Engineering
Job Type: Full Time
Job Location: China

Shenzhen, Wuhan, Shanghai, Suzhou

We’re a fast-moving technology company focused on bringing to market innovative solutions that solve complex engineering problems. You’ll be part of a highly accomplished team with excellent professional development and upside potential.

We are looking for highly motivated mixed-signal design engineers for the development of ultra-high-speed IC solutions. Core responsibilities include circuit development as well as all elements necessary to model, design, verify and productize high-performance analog solutions.


  • Excellent problem-solving skills
  • Ability to work independently as well as within a dynamic team environment
  • Strong multi-tasking ability
  • Strong written and verbal communication skills


  • Minimum 5 years’ experience as an IC layout designer
  • Proficiency in the use of advanced schematic capture and layout tools (e.g. Cadence Virtuoso)
  • Understanding of fundamental IC design concepts, including an appreciation of device models, layout and non-idealities (e.g. parasitics) affecting performance


  • Bachelors in Electrical Engineering
  • Experience in manual full-custom analog layout of IC in CMOS/Bi-CMOS process
  • Experience with high-frequency layout
  • Skilled in design verification and debugging such as DRC, ERC, ESDDRC, LVS, ANTENNA DRC, using verification tool such as PVS
  • Able to do feasibility studies, floorplan with many high-speed signal constraints, power plan
  • Floor planning from sub-block to chip top level
  • Very good understanding of matching techniques
  • Experience of critical analog layout design of blocks such as Temperature sensor, PLL, ADC, DAC, Bandgap, Ref Generators, Current Mirrors, Comparator, Differential Amplifier, etc.

Compensation will be competitive.

If you are interested and meet the qualifications above, please send your resume to: or apply on this page.

Apply for this position

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